Conference Papers and PresentationsTotal: 323
  • Pui In Mak, Ka Hou Ao Ieong, Chong-Yin Fok, Seng-Pan U, R. P. Martins, "A Complex Low-IF Transceiver Architecture for Relaxing Phase Noise and Settling Time Requirements of RF PLL-FS", in Proc. of IEEJ (7th) International Analog VLSI Workshop (AVLSIWS), pp. 221-226, Oct-2004.
  • Ka Hou Ao Ieong, Chong-Yin Fok, Seng-Pan U, R. P. Martins, "A Multistandard Transmitter D/A Interface with Embedded Frequency Up-Conversion and Two-Step Channel Selection", in Proc. of IEEJ (7th) International Analog VLSI Workshop (AVLSIWS), pp. 215-220, Oct-2004.
  • Pui In Mak, Seng-Pan U, R. P. Martins, "A Power-and-Area Efficient, Multifunctional CMOS A/D Interface for a Low-IF/Zero-IF Reconfigurable Receiver", ", in Proc. of IEEJ (7th) International Analog VLSI Workshop (AVLSIWS), pp. 233-238, Oct-2004.
  • Weng Ieng Mok, Pui In Mak, Seng-Pan U, R. P. Martins, "Model, Characterization and Solutions of Unstable Reference Voltage for Very-High-Speed Pipelined A/D Converters", in Proc. of IEEJ (7th) International Analog VLSI Workshop (AVLSIWS), pp. 138-143, Oct-2004.
  • Sai Weng Sin, Seng-Pan U, R. P. Martins, "Novel Low Jitter Multi-Phase Clock Generation Scheme for Parallel Analog-to-Digital Conversion Systems", Proc. IEEE/IEEJapan International Analog VLSI Workshop – AVLSIWS 2004, pp. 172-175, Oct-2004.
  • Ngai Kong, Seng-Pan U, R. P. Martins, "A Novel Current-Mode Reconfigurable Membership Function Circuit for Mixed-Signal Fuzzy Hardware", Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2006, pp. 101-104, Jul-2004.
  • Weng Ieng Mok, Pui In Mak, Seng-Pan U, R. P. Martins, "Modeling of Noise Sources in Reference Voltage Generator for Very-High-Speed Pipelined ADC", in Proc. of the 47th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), vol. 1, pp. 5-8, Jul-2004.
  • Kin-Sang Chio, Seng-Pan U, R. P. Martins, "A Novel Low-Voltage 2nd-Order Sigma-Delta Modulator with Double-Sampling for GSM/DECT/WCDMA", in Proc. of International Conference on Communications, Circuits and Systems (ICCCAS), vol. 2, pp. 1146-1150, Jun-2004.
  • Sai Weng Sin, Seng-Pan U, R. P. Martins, "A Generalized Timing-Skew-Free, Multi-Phase Clock Generation Platform for Parallel Sampled-Data Systems", in Proc. of 2004 IEEE International Symposium on Circuits and Systems (ISCAS), vol. 1, pp. I-369 – I-372, May-2004.
  • Pui In Mak, Seng-Pan U, R. P. Martins, "A Low-IF/Zero-IF Reconfigurable Receiver with Two-Step Channel Selection Technique for Multistandard Applications", ", in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), vol. 4, pp. 417-420, May-2004.